Microcomputer integrated circuits are used to control a wide variety of products ranging from a simple household appliance to a complex automobile. One of the important uses carried out by microcomputer integrated circuits is timing control. As an example, a household appliance may require a microcomputer timer to count how much time has elapsed between two events in order to control the appliance. In addition, a timer may be used as a real time clock or a stopwatch type clock to keep track of actual elapsed time.
Many prior art timers use one or more counter circuits which are incremented or decremented by an input signal. This input signal is commonly some type of clock signal. By using a clock signal to increment or decrement a counter, the counter is incremented or decremented at regular intervals.
However, a problem arises when the value of a counter must be read using more than one read access cycle. For example, if a counter is 32-bits wide and the bus used to transfer information during the read access to the counter is only 16-bits wide, the counter value must be read 16-bits at a time using two read access cycles. Unfortunately, however, the clock signal incrementing or decrementing the counter may increment or decrement the counter one or more times between the read access of the first portion of the counter and the read access of the second portion of the counter. During the latency period between the two read accesses, the counter continues to increment or decrement and may reach a "rollover" point before the second read takes place, causing a large error in the resulting value. Rollover is the point at which an up-counter reaches its maximum value (e.g. all 1's) and rolls over to its minimum value (e.g. all 0's), or a down-counter reaches its minimum value (e.g. all 0's) and rolls over to its maximum value (e.g. all 1's).
This large rollover error is a significant problem. Some prior art circuits solved this rollover error problem by adding a set of temporary latches which are capable of storing the portion of the counter which was not read during the first read access. The term "temporary" indicates that the latches temporarily store the unread counter portion value until the second read access occurs, at which time the value in the temporary latches is read.
As an example, if the 8-bit upper portion of a 16-bit down-counter is transferred across an 8-bit bus during a first read access, the corresponding 8-bit lower portion of the 16-bit down-counter is loaded and stored in a set of temporary latches. Thus the temporary latches are updated with the contents of the unread portion of the counter when the read of the upper portion of the counter takes place. The temporary latches store the corresponding 8-bit lower portion of the down-counter during the read latency period. Then the subsequent read access of the lower portion of the counter reads the value stored in the temporary latches, instead of the present value of the lower portion of the counter, which may have been incremented or decremented since the first read access. As a result, any counter activity during the read latency period between the first read access and the second read access, including counter rollover, has no effect on the composite value read from the various portions of the counter.
Unfortunately, implementation of temporary latches requires extra semiconductor area on an integrated circuit. A solution which avoids the large rollover error and which requires less semiconductor area is required.